-- Oscilloscope

#INCLUDE "course.module"

#INCLUDE "love.inc"
#INCLUDE "trace.inc"
#USE "vectorutils"
#USE "plumbing"
#USE "widgets"
#USE "lib"

PROC scope.component (PROC.CTL? ctl)
  PROC scope (CHAN CHUNK in?, out!, CHAN MOBILE []VEC.ENTRY disp!)
    VAL INT h.samples IS min.int (RATE / 100, CHUNK.SIZE):
    VAL INT h.res IS 40:
    [h.res]REAL32 bins:
    REAL32 scale:
    VAL INT bin.width IS h.samples / h.res:
    VAL INT skip IS (RATE / CHUNK.SIZE) / 4:
    WHILE TRUE
      CHUNK ch:
      SEQ
        SEQ i = 0 FOR skip - 1
          SEQ
            in ? ch
            out ! ch
        in ? ch
        scale := 0.0
        SEQ i = 0 FOR h.res
          SEQ
            bins[i] := 0.0
            SEQ j = 0 FOR bin.width
              bins[i] := bins[i] + ch[(i * bin.width) + j]
            bins[i] := bins[i] / (REAL32 ROUND bin.width)
            VAL REAL32 aval IS ABS (bins[i]):
            IF
              aval > scale
                scale := aval
              TRUE
                SKIP
        IF
          scale = 0.0
            scale := 0.1
          TRUE
            SKIP
        INITIAL MOBILE []VEC.ENTRY v IS MOBILE [h.res + 4]VEC.ENTRY:
        INITIAL INT n IS 0:
        VAL REAL32 s IS scale * 2.0:
        SEQ
          vec.colour (v, n, 0.0, 0.3, 0.0, 1.0)
          vec.fillrect (v, n, 0.0, 0.0, 1.0, 1.0)
          vec.colour (v, n, 0.3, 1.0, 0.3, 1.0)
          SEQ i = 1 FOR (h.res - 1)
            VAL REAL32 px IS (REAL32 ROUND (i - 1)) / (REAL32 ROUND h.res):
            VAL REAL32 x IS (REAL32 ROUND i) / (REAL32 ROUND h.res):
            VAL REAL32 py IS 0.5 - (bins[i - 1] / s):
            VAL REAL32 y IS 0.5 - (bins[i] / s):
            vec.line (v, n, px, py, x, y)
          vec.real32 (v, n, 0.0, 0.0, 0.1, scale)
          vec.stop (v, n)
          disp ! v
        out ! ch
  :
  STREAM.WIRE? inw:
  STREAM.WIRE! inw.c:
  PORT.CTL? outp:
  PORT.CTL! outp.c:
  PROC.UI? ui:
  PROC.UI! ui.c:
  SEQ
    ctl[resp] ! reg.counts; 1; 1
    inw, inw.c := MOBILE STREAM.WIRE
    ctl[resp] ! reg.stream.in; inw.c
    outp, outp.c := MOBILE PORT.CTL
    ctl[resp] ! reg.stream.out; outp.c
    ui, ui.c := MOBILE PROC.UI
    ctl[resp] ! reg.ui; ui.c
    ctl[resp] ! reg.done

    CHAN CHUNK thru:
    PAR
      dump.events (ui[event]?)
      scope (inw[c]?, thru!, ui[disp]!)
      stream.port (thru?, outp)
: